Texas Instruments TMS320C6A816 Series Technical Reference Manual page 5

C6-integra dsp+arm processors
Table of Contents

Advertisement

www.ti.com
2.4.7
DMM PAT View Registers: DMM_PAT_VIEW_0-DMM_PAT_VIEW_2
2.4.8
DMM View Map Registers: DMM_PAT_VIEW_MAP_0-DMM_PAT_VIEW_MAP_4
2.4.9
DMM PAT View Mapping Base Address Register: DMM_PAT_VIEW_MAP_BASE
2.4.10 DMM PAT End of Interrupt Register: DMM_PAT_IRQ_EOI
2.4.11 DMM PAT Raw Interrupt Status Register: DMM_PAT_IRQSTATUS_RAW
2.4.12 DMM PAT Interrupt Status Register: DMM_PAT_IRQSTATUS
2.4.13 DMM PAT Interrupt Enable Register: DMM_PAT_IRQENABLE_SET
2.4.14 DMM PAT Interrupt Disable Register: DMM_PAT_IRQENABLE_CLR
2.4.15 DMM PAT Status Registers: DMM_PAT_STATUS_0-DMM_PAT_STATUS_3
2.4.16 DMM PAT Descriptor Registers: DMM_PAT_DESCR_0-DMM_PAT_DESCR_3
2.4.17 DMM PAT Area Geometry Registers: DMM_PAT_AREA_0-DMM_PAT_AREA_3
2.4.18 DMM PAT Control Registers: DMM_PAT_CTRL_0-DMM_PAT_CTRL_3
2.4.19 DMM PAT Area Entry Data Registers: DMM_PAT_DATA_0-DMM_PAT_DATA_3
2.4.20 DMM PEG Priority Registers: DMM_PEG_PRIO_0-DMM_PEG_PRIO_1
2.4.21 DMM PEG Priority Registers for PAT: DMM_PEG_PRIO_PAT
3
EMAC/MDIO Module
...............................................................................................................
3.1
Introduction
3.1.1
Overview
3.1.2
Features
3.1.3
Functional Block Diagram
3.1.4
EMAC and MDIO Block Diagram
3.1.5
Industry Standard(s) Compliance Statement
3.1.6
List of Terms
...............................................................................................................
3.2
Architecture
3.2.1
Clock Control
3.2.2
Memory Map
3.2.3
Signal Descriptions
3.2.4
Ethernet Protocol Overview
3.2.5
Programming Interface
3.2.6
EMAC Control Module
3.2.7
MDIO Module
3.2.8
EMAC Module
3.2.9
Media Independent Interface (MII)
3.2.10 Packet Receive Operation
3.2.11 Packet Transmit Operation
3.2.12 Receive and Transmit Latency
3.2.13 Transfer Node Priority
3.2.14 Reset Considerations
3.2.15 Initialization
3.2.16 Interrupt Support
3.2.17 Power Management
3.2.18 Emulation Considerations
..................................................................................................................
3.3
Registers
3.3.1
EMAC Control Module Registers
3.3.2
Ethernet Media Access Controller (EMAC) Registers
3.3.3
MDIO Registers
4
General-Purpose I/O (GPIO) Interface
...............................................................................................................
4.1
Introduction
4.1.1
Purpose of the Peripheral
4.1.2
Features
4.1.3
Block Diagram
...............................................................................................................
4.2
Architecture
4.2.1
Operating Modes
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Preliminary
.........................................................................................................
.........................................................................................................
..........................................................................................................
......................................................................................
.............................................................................
.....................................................................................................
....................................................................................................
.....................................................................................................
.............................................................................................
....................................................................................
.........................................................................................
..........................................................................................
....................................................................................................
...................................................................................................
............................................................................
....................................................................................
...................................................................................
...............................................................................
.........................................................................................
..........................................................................................
.....................................................................................................
...............................................................................................
...........................................................................................
.....................................................................................
.............................................................................
.................................................................................................
.................................................................................
......................................................................................
..........................................................................................................
...................................................................................................
................................................................................................
© 2011, Texas Instruments Incorporated
.................................
.............................................
.........................................
..................................
.................................
.........................................
................................................................
......................................................
389
...................
390
..................
391
391
...........................
393
395
397
399
.......................
401
.....................
402
...................
402
.............................
403
..................
403
.............................
404
404
405
406
406
406
407
407
408
408
410
410
410
411
413
414
425
428
432
435
439
444
444
445
445
446
450
454
454
455
455
465
514
527
528
528
528
529
530
530
Contents
5

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TMS320C6A816 Series and is the answer not in the manual?

Table of Contents