DIAGNOSTICS
10DEC05
Table 15 Test Points on the MASTER CENTRAL PROCESSING UNIT BOARD A2
DG4825-1
Page
TP
167 of 180
1
4
5
8
9
14
21
Table 16 LEDs on the MASTER CENTRAL PROCESSING UNIT BOARD A2
LED
DS1
DS2
DS3
DS4
DS5
DS6
Important
•
The SWITCHES on the MASTER CENTRAL PROCESSING UNIT BOARD A2 have no
service functions.
•
Use the table to set the correct positions of the SWITCHES.
Description
Output of the +0.5 V DC REGULATOR
Output of the +3.3 V DC REGULATOR
Ground
+24 V DC power
Power after FILTER INDUCTOR
Output of the +12 V DC REGULATOR
Output of the 3.3 V DC REGULATOR
ETHERNET RECEIVER is energized
ETHERNET TRANSMITTER is energized
ETHERNET TRANSCEIVER is receiving correct idle codes
ETHERNET TRANSCEIVER has detected a malfunction
ETHERNET SYSTEM is operating at 100 Mb/s
ETHERNET TRANSCEIVER is in the "TRSTE pin state"
4.9 - 5.1 V DC
3.2 - 3.4 V DC
0 V DC
22.5 - 25.5 V DC
22.5 - 25.5 V DC
11.8 - 12.2 V DC
3.2 - 3.4 V DC
Description
Test Points and LEDs
Expected Signal