Register Map - Toshiba TX79 Series User Manual

TX7901 internal registers are mapped from 0x1E00_0000 to 0x1EFF_FFFF (16 MB). The
ROM/SRAM addresses are mapped from 0x1F00_0000 to 0x20FF_FFFF (32 MB).
Main memory space (SDRAM) can be located anywhere except in the internal register range.
This memory space is located on the C790 Bus. PCI memory space can also be located
anywhere except in that range, and up to four segments (including one I/O space) are
allowed. Note that all nine segments must be non-overlapping and are programmed by the
user. For details, please refer to the chapters on the SDRAM memory controller and PCI
controller.

4.2 Register Map

The following is the register map of the TX7901 built-in modules:
0x1E00_0000 -
0x1E00_1000 -
0x1E00_2000 -
0x1E00_3000 -
0x1E00_4000 -
0x1E00_5000 -
0x1E00_6000 -
0x1E00_7000 -
0x1E00_8000 -
0x1E00_9000 -
0x1E00_A000 -
0x1E00_B000 -
0x1E00_C000 -
0x1E01_0000 -
For more information, please refer to the chapter that pertains to the relevant module.
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 4: Address Maps
0x1E00_0FFF
0x1E00_1FFF
0x1E00_2FFF
0x1E00_3FFF
0x1E00_4FFF
0x1E00_5FFF
0x1E00_6FFF
0x1E00_7FFF
0x1E00_8FFF
0x1E00_9FFF
0x1E00_AFFF
0x1E00_BFFF
0x1E00_FFFF
0x1EFF_FFFF
4-2
SDRAM Memory Controller on the C790 Bus
DMA Controller
G-Bus Bridge and Interrupt Controller
PCI Bridge (PGB)
Timer/Counter
MAC0
MAC1
UART0
UART1
SPI (TSEI) and GPIO
PCI Bridge (PGB1): optional
Reserved
Reserved
Reserved