R Egisters - Toshiba TX79 Series User Manual

Tx system risc symmetric 2-way superscalar 64-bit cpu
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6.5 Registers
The following table is a register map of the SDRAM Memory Controller Module.
Table 6-3 List of SDRAM Memory Controller Registers
Name
SDRAM Memory Controller, Base Address 0x1E00_0000
D0PR
D1PR
D2PR
D3PR
DOMR
DEMR
DEESR
DEEAR
DREFRESH
DDRIVE
D0LOW
D0HIGH
D1LOW
D1HIGH
D2LOW
D2HIGH
D3LOW
D3HIGH
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 6: SDRAM Memory Controller
Register Description
DIMM 0 Parameters Register
DIMM 1 Parameters Register
DIMM 2 Parameters Register
DIMM 3 Parameters Register
Operation Mode Register
ECC Mode Register
ECC Error Status Register
ECC Error Address Register
RESERVED
Refresh Register
SDRAM Interface Output Drive- Strength
Control Register
DIMM 0 LOW Address Decode
DIMM 0 HIGH Address Decode
DIMM 1 LOW Address Decode
DIMM 1 HIGH Address Decode
DIMM 2 LOW Address Decode
DIMM 2 HIGH Address Decode
DIMM 3 LOW Address Decode
DIMM 3 HIGH Address Decode
Address
0x1E00_0000
0x1E00_0010
0x1E00_0020
0x1E00_0030
0x1E00_0040
0x1E00_0050
0x1E00_0060
0x1E00_0070
0x1E00_0080
0x1E00_0090
0x1E00_00A0
0x1E00_0100
0x1E00_0110
0x1E00_0120
0x1E00_0130
0x1E00_0140
0x1E00_0150
0x1E00_0160
0x1E00_0170
6-7
R/W
Size(b)
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R
128
R
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128
R/W
128

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