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10.4.8
Timer Read Registers (TMTRR0, TMTRR1, TMTRR2)
The following figure and Table 10-11 detail the fields of the Timer Read Registers TMTRR0,
TMTRR1 and TMTRR2.
31
15
Table 10-11 Field Descriptions of Timer Read Registers TMTRRx
Bit(s)
Field
Field Name
31:24
–
Timer Counter
23:0
TCNT
Note: The register fields marked "Reserved" are read back as zeroes, and are ignored when written to.
10.5 Programmable Timer/Counter Operation
This section describes the operation of the Programmable Timers/Counters in each of the
three modes in which they can operate. Note that not all of the operational modes are
available in every timer/counter. (See Table 10-1.)
10.5.1
Interval Timer Mode Operation
This mode is set up by setting the timer mode (TMODE) field of the timer control register
(TMTCR) to 0b00 (binary). The Counter Clock Select (CCS) bit of the TMTCR register
determines whether the internal system clock or the external clock input is selected.
Dividing down the selected (internal or external) clock by the value set up for the divisor
generates the actual clock frequency. This value is set up in the Counter Clock Divide (CCD)
field of the divider register (TMCCDR) and is activated by setting the Counter Clock Divide
Enable (CCDE) bit of the TMTCR register to "1". The clock can be divided down by powers
of 2, ranging from 2 to 256, depending on the value in the 3-bit CCD field. (If the external
clock input is to be used, the clock edge at which the count happens is selectable by setting
up the External Clock Edge Select (ECES) field of the TMTCR register.)
When the Timer Count Enable (TCE) field of the timer control register TMTCR is set to "1",
the 24-bit counter begins counting. When the count value reaches (i.e., matches) the value
of compare register A (TMCPRA), the Timer Interval Interrupt Status (TIIS) bit of the Timer
Interrupt status register (TMTISR) is set to "1". At this point the interrupt control logic passes
the inverted TIIS bit as the timer interrupt request signal TMINTREQ*, driving it Low (since
TIIS* = 0), if the Timer Interval Interrupt Enable (TIIE) bit of the Interval Timer Mode Register
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 10: Programmable Timer/Contents
24
0
8
TCNT
R/W
–
R/O
Reserved
The 24-bit value is copied to this register. The count value may be
Value
R/O
verified by reading this register. In the Preset Mode (TMTEST = 1) an
arbitrary value may be written to this register. (0x000000)
23
TCNT
8
16
Description
10-14
16
0
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