Toshiba TX79 Series User Manual page 234

Tx system risc symmetric 2-way superscalar 64-bit cpu
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12.3.1.19 Back to Back IPG Register (IPGReg)
This Register contains the first bus error address.
63
31
Bits
63:7
6:0
Inter-Packet Gap (IPG) is the measurement between the last nibble of CRC and the first
nibble of the preamble of the next packet.
In 100 Mb Ethernet, the IPG is defined as 0.96 microseconds. In 10 Mb Ethernet, the IPG is
defined as 9.6 microseconds.
The IPG Time (IPGT) is used to space back-to-back transmit packets. The transmit state
machine has an intrinsic delay of 6 clock cycles (macxTxClk) between packets. In other
words, with IPGT set to 0, the resultant IPG will be 6 clock cycles. Thus the equation is:
where T is the period of macxTxClk.
Here is a simple chart of IPGT values for 100 Mb and 10 Mb Ethernet:
Table 12-28 Inter Packet Gap T values for 100 Mb / 10 Mb
Where T = 40µs for 100 Mb and T = 400 µs for 10 Mb.
*:IEEE 802.3 standard recommended (0.96µs/9.6µs)== default
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 12: 10/100 IEEE802.3 Media Access Controller
0
25
Table 12-27 IPGReg Register Field Descriptions
Field
R/W
R/W
Reserved (0x000)
IPGT
R/W
Back-To-Back IPG length. Default is 0x15.
IPG = ( 6 + IPGT ) × T
IPGT
100 Mb
0x01
0.28µs
0x05
0.44µs
0x09
0.60µs
0x0D
0.76µs
0x12*
0.96µs
0x1D
1.40µs
0
32
Description
10 Mb
2.8µs
4.4µs
6.0µs
7.6µs
9.6µs
14.0µs
12-26
7
6
IPGT
7
32
0

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