Toshiba TX79 Series User Manual page 144

Tx system risc symmetric 2-way superscalar 64-bit cpu
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8.3.2.2
G-Bus to PCI Memory Address Window Registers
The G-Bus access PCI locations through G-Bus memory address windows called
g2pwindows. Each g2pwindow is defined by four registers: g2pUpper, g2pLower, g2pBase,
and g2pCycleType. The PGB provides four G2Pwindows.
The four g2pUpper and g2pLower register pairs are compared to the current G-Bus address
on each Gbstart cycle. For each pair, if the G-Bus address is greater than or equal to
g2pLower and the G-Bus address + (burstSize-1) is less than g2pUpper, the address is
judged to be within that G2Pwindow and a PCI cycle is initiated.
When a PCI cycle is initiated, g2pLower is subtracted from the G-Bus address and g2pBase
is added to the remainder to produce the effective PCI address. G-Bus access to these
registers is allowed using the G-Bus single cycle mode.
Note: The behavior of overlapping windows is undefined.
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 8: PCI/G-Bus Bridge
8-22

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