A Ddress M Apping - Toshiba TX79 Series User Manual

Tx system risc symmetric 2-way superscalar 64-bit cpu
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6.6 Address Mapping
sysPAddr[27:0] is assorted into bank, row, and column addresses. This section describes
the mapping of address bits for performance analysis purposes.
Address range
Device size
sysPAddr
System elements
Device Type
Bank address
16 Mb
64 Mb
128 Mb
256 Mb
– :
No pins in this device
× :
Don't care
AP: Auto Precharge: Assign a constant of 1 to this bit.
Number: bit number of sysPAddr [27:3]
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 6: SDRAM Memory Controller
256 MB
128 MB
64 MB
31
28 27 26 25 24 23
256 MB Region Size
Row Address
BA[1:0]
RA[12:0]
1 0
12 11 10 ... 0
– 6
– – 22 ...12
7 6
– 24 22 ...12
7 6
– 24 22 ...12
7 6
27 24 22 ...12
16 MB
12 11 ---------6 5 4 3 2 1 0
4 KB
Page
Size
Column Address
12 11 10 9
×
×
× AP × 25 23 11... 8 5 ...3
× AP 26 25 23 11... 8 5 ... 3
×
× AP 26 25 23 11... 8 5 ... 3
6-22
64 B
16 B = 128b
8 B = 64 b
SDRAM bus size
sysBus size
Cache line size
CA[12:0]
8
7
6 ... 3 2 ... 0
7 23 11... 8 5 ...3

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