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10.4.2
Interval Timer Mode Registers TMITMR0, TMITMR1, TMITMR2
The following figure and
TMITMR0, TMITMR1, and TMITMR2.
31
15
14
T
I
I
E
1
Table 10-5 Fields Descriptions of Interval Timer Mode Registers TMITMRx
Bit(s)
Field
Field Name
31:16
–
Timer's Interval
15
TIIE
Timer Interrupt
14:1
–
Interval Timer
Zero Clear
0
TZCE
Note: The register fields marked "Reserved" are read back as zeroes, and are ignored when written to.
TX7901 User's Manual (Rev. 6.30T – Nov, 2001)
Chapter 10: Programmable Timer/Contents
Table 10-5
R/W
–
R/O
Reserved
Sets up interrupt enable/disable in the interval timer mode. (0)
R/W
0: Disable (mask)
Enable
1: Enable
–
R/O
Reserved
Determines whether to clear the counter to "0" after the count value matches
compare register A. If not cleared, the counter is halted at that value. If the
timer interrupt is terminated when TZCE = 0 while the counter is halted, the
R/W
interrupt will not recur. (0)
Enable
0: Disable
1: Enable
detail the fields for the Interval Timer Registers
0
16
0
14
Description
10-7
16
1
0
T
Z
C
E
1
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