Ports And Attributes; Interfacing To The Rx Afe; Rx Equalization; Functional Description - Xilinx Virtex-6 FPGA User Manual

Ports and Attributes

Table 4-2
Table 4-2: RX AFE Ports
Table 4-3
Table 4-3: RX AFE Attributes

Interfacing to the RX AFE

The RX AFE is only to be used with external AC coupling capacitors. The recommended
value for the AC coupling capacitor is 100 nF. For the maximum and minimum swing
requirements, refer to DS152, Virtex-6 FPGA Data Sheet: DC and Switching Characteristics.

RX Equalization

Functional Description

The GTH receiver has a continuous time linear equalizer (CTLE) and a decision feedback
equalizer (DFE). The CTLE can be tuned to compensate for signal distortion due to
high-frequency attenuation in the physical channel. It has 16 different frequency responses
to allow for a close match to the channel. The user needs to manually tune the settings
based on simulation or hardware testing results.
The DFE works in conjunction with the CTLE to further enhance the equalized eye by
reducing the post-cursor tail of the transmitted bit. The DFE in this transceiver is
implemented as a three-tap architecture. In addition to the DFE, an automatic gain control
(AGC) block pre-scales the input to be optimal for the DFE. The built-in auto-adaptation
algorithm automatically configures the DFE and the AGC for maximum internal eye
height.
Virtex-6 FPGA GTH Transceivers User Guide
UG371 (v2.0) February 16, 2010
defines the RX AFE ports.
Port Dir
RXN0 In (Pad)
RXN1
RXN2
RXN3
RXP0
RXP1
RXP2
RXP3
defines the RX analog front end attributes.
Attribute
RX_CFG2_LANE0 16-bit Binary
RX_CFG2_LANE1
RX_CFG2_LANE2
RX_CFG2_LANE3
www.xilinx.com
Clock Domain
RX Serial Clock RXN and RXP are differential complements of
each other, forming a differential receiver input
pair. These ports represent pads. The location of
these ports must be constrained and brought to
the top level of the design.
Type
[15:13]: Reserved. Tie these inputs to 4'b0000.
[12]: RX AFE AC coupling mode enable. Set this
input to 1'b1.
[11:0]: Reserved. Use the recommended values from
the Virtex-6 FPGA GTH Transceiver Wizard.
RX Equalization
Description
Description
105