Cooling Fan
The XCKU040 device U1 cooling fan connector is shown in
when the KCU105 board is powered up due to pull-up resistor R422. The SM_FAN_PWM and
SM_FAN_TACH signals are wired to the XCKU040 device U1 bank 64 pins AJ9 and AJ8,
respectively, which enables the user to implement their own fan speed control IP in the
FPGA U1 logic.
X-Ref Target - Figure 1-38
KCU105 Board Zynq-7000 AP SoC XC7Z010 System Controller
[Figure
1-2, callout 36]
The KCU105 board Zynq-7000 AP SoC XC7Z010 system controller sub-system implements
interfaces to:
•
PMBus power system
•
Programmable user clock
•
USB UART2
•
Five directional user pushbutton switches
•
I2C bus MUXes
KCU105 Board User Guide
UG917 (v1.4) September 25, 2015
Chapter 1: KCU105 Evaluation Board Features
Figure 1-38: Cooling Fan Circuit
www.xilinx.com
Figure
1-38.The fan turns on
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