Nvic Register Map; Table 48. Nvic Register Map And Reset Values - ST STM32F4 Series Programming Manual

Core peripherals
4.3.11

NVIC register map

This table shows the NVIC register map and reset values. The base address of the main
NVIC register block is 0xE000E100. The NVIC_STIR register is located in a separate block
at 0xE000EF00.
Offset Register
NVIC_ISER0
0x000
Reset Value
NVIC_ISER1
0x004
Reset Value
NVIC_ISER2
0x008
Reset Value
NVIC_ICER0
0x080
Reset Value
NVIC_ICER1
0x084
Reset Value
NVIC_ICER2
0x088
Reset Value
NVIC_ISPR0
0x100
Reset Value
NVIC_ISPR1
0x104
Reset Value
NVIC_ISPR2
0x108
Reset Value
NVIC_ICPR0
0x180
Reset Value
NVIC_ICPR1
0x184
Reset Value
NVIC_ICPR2
0x188
Reset Value
NVIC_IABR0
0x200
Reset Value
NVIC_IABR1
0x204
Reset Value
NVIC_IABR2
0x208
Reset Value
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Table 48. NVIC register map and reset values

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reserved
DocID022708 Rev 6
SETENA[31:0]
SETENA[63:32]
SETENA [80:64]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CLRENA[31:0]
CLRENA[63:32]
CLRENA [80:64]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SETPEND[31:0]
SETPEND[63:32]
SETPEND [80:64]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CLRPEND[31:0]
CLRPEND[63:32]
CLRPEND [80:64]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ACTIVE[31:0]
ACTIVE[63:32]
ACTIVE [80:64]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PM0214