Fault Types; Table 18. Faults - ST STM32F4 Series Programming Manual

The Cortex-M4 processor
2.4.1

Fault types

Table 18
status register, and the register bit that indicates that the fault has occurred. See
Configurable fault status register (CFSR; UFSR+BFSR+MMFSR) on page 236
information about the fault status registers.
Bus error on a vector read
Fault escalated to a hard fault
MPU or default memory map
mismatch:
– on instruction access
– on data access
– during exception stacking
– during exception unstacking
– during lazy floating-point state
preservation
Bus error:
– During exception stacking
– During exception unstacking
– During instruction prefetch
– During lazy floating-point state
preservation
Precise data bus error
Imprecise data bus error
Attempt to access a coprocessor
Undefined instruction
Attempt to enter an invalid instruction
set state
Invalid EXC_RETURN value
Illegal unaligned load or store
Divide By 0
1. Occurs on an access to an XN region even if the MPU is disabled.
2. Attempting to use an instruction set other than the Thumb instruction set, or returns to a non load/store-
multiple instruction with ICI continuation.
44/260
shows the types of fault, the handler used for the fault, the corresponding fault
Fault
(2)

Table 18. Faults

Handler
VECTTBL
Hard fault
FORCED
-
IACCVIOL
DACCVIOL
MemManage
MSTKERR
MUNSKERR
MLSPERR
-
STKERR
UNSTKERR
IBUSERR
Bus fault
LSPERR
PRECISERR
IMPRECISERR
NOCP
UNDEFINSTR
INVSTATE
Usage fault
INVPC
UNALIGNED
DIVBYZERO
DocID022708 Rev 6
Bit name Fault status register
Hard fault status register
(HFSR) on page 240
(1)
Memory management fault
address register (MMFAR)
on page 241
-
Bus fault address register
(BFAR) on page 241
Configurable fault status
register (CFSR;
UFSR+BFSR+MMFSR) on
page 236
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