ST STM32F4 Series Programming Manual page 219

Cortex-m4
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PM0214
Offset
Register
NVIC_IPR0
0x300
Reset Value
:
:
NVIC_IPR25
0x368
Reset Value
NVIC_STIR
0xE00
Reset Value
Table 48. NVIC register map and reset values (continued)
IP[3]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DocID022708 Rev 6
IP[2]
:
SCB registers
Reserved
Reserved
Core peripherals
IP[1]
IP[101]
IP[100]
INTID[8:0]
0 0 0 0 0 0 0 0 0
IP[0]
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