Bitfield Instructions; Table 31. Instructions That Operate On Adjacent Sets Of Bits - ST STM32F4 Series Programming Manual

Cortex-m4
Hide thumbs Also See for STM32F4 Series:
Table of Contents

Advertisement

PM0214
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not affect the flags.
Examples
SXTAH
UXTAB
3.9

Bitfield instructions

Table 31
Mnemonic
BFC
BFI
SBFX
SXTB
SXTH
UBFX
UXTB
UXTH
R4, R8, R6, ROR #16 ; Rotates R6 right by 16 bits, obtains bottom
; halfword, sign extends to 32 bits, adds R8,and
; writes to R4
R3, R4, R10
; Extracts bottom byte of R10 and zero extends to 32
; bits, adds R4, and writes to R3.
shows the instructions that operate on adjacent sets of bits in registers or bitfields.

Table 31. Instructions that operate on adjacent sets of bits

Brief description
Bit field clear
Bit field insert
Signed bit field extract
Sign extend a byte
Sign extend a halfword
Unsigned bit field extract
Zero extend a byte
Zero extend a halfword
DocID022708 Rev 6
The STM32 Cortex-M4 instruction set
See
BFC and BFI on page 138
BFC and BFI on page 138
SBFX and UBFX on page 139
SXT and UXT on page 140
SXT and UXT on page 140
SBFX and UBFX on page 139
SXT and UXT on page 140
SXT and UXT on page 140
137/260
259

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F4 Series and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

This manual is also suitable for:

Stm32l4+ seriesStm32f3 series

Table of Contents

Save PDF