Accessing The Cortex-M4 Nvic Registers Using Cmsis; Table 45. Cmsis Access Nvic Functions - ST STM32F4 Series Programming Manual

Core peripherals
4.3.1

Accessing the Cortex-M4 NVIC registers using CMSIS

CMSIS functions enable software portability between different Cortex-M profile processors.
To access the NVIC registers when using CMSIS, use the following functions:
void NVIC_EnableIRQ(IRQn_Type IRQn)
void NVIC_DisableIRQ(IRQn_Type IRQn)
void NVIC_SetPendingIRQ(IRQn_Type IRQn)
void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
uint32_t NVIC_GetPriority(IRQn_Type IRQn)
1. The input parameter IRQn is the IRQ number,
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Table 45. CMSIS access NVIC functions

(1)
CMSIS function
DocID022708 Rev 6
Description
Enables an interrupt or exception.
Disables an interrupt or exception.
Sets the pending status of interrupt or
exception to 1.
Clears the pending status of interrupt or
exception to 0.
Reads the pending status of interrupt or
exception. This function returns non-
zero value if the pending status is set to
1.
Sets the priority of an interrupt or
exception with configurable priority level
to 1.
Reads the priority of an interrupt or
exception with configurable priority
level. This function return the current
priority level.
PM0214