Smlad - ST STM32F4 Series Programming Manual

PM0214
3.6.4

SMLAD

Signed Multiply Accumulate Long Dual
Syntax
op{X}{cond} Rd, Rn, Rm, Ra
Where:
• op is one of the following:
SMLAD: Signed multiply accumulate dual.
SMLADX: Signed multiply accumulate dual reverse. X specifies which halfword of the
source register Rn is used as the multiply operand.
If X is omitted, the multiplications are bottom × bottom and top × top.
If X is present, the multiplications are bottom × top and top × bottom.
•
'cond' is an optional condition code (see
• 'Rd' is the destination register.
•
'Rn' is the first operand register holding the values to be multiplied.
• 'Rm' is the second operand register.
•
'Ra' is the accumulate value.
Operation
The SMLAD and SMLADX instructions regard the two operands as four halfword 16-bit
values. The SMLAD and SMLADX instructions:
1. Either:
a)
b)
2. Add both multiplication results to the signed 32-bit value in Ra.
3. Write the 32-bit signed result of the multiplication and addition to Rd.
Restrictions
Do not use either SP or PC.
Condition flags
These instructions do not change the flags.
Examples
SMLAD
SMLALDX R0, R2, R4, R6
If X is not present, multiply the top signed halfword value in Rn with the top signed
halfword of Rm and the bottom signed halfword values in Rn with the bottom
signed halfword of Rm.
If X is present, multiply the top signed halfword value in Rn with the bottom signed
halfword of Rm and the bottom signed halfword values in Rn with the top signed
halfword of Rm.
R10, R2, R1, R5 ; Multiplies two halfword values in R2 with
; corresponding halfwords in R1, adds R5 and writes
; to R10
; Multiplies top halfword of R2 with bottom halfword
; of R4, multiplies bottom halfword of R2 with top
; halfword of R4, adds R6 and writes to R0.
DocID022708 Rev 6
The STM32 Cortex-M4 instruction set
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Conditional execution on page 64).
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