Vcmp, Vcmpe - ST STM32F4 Series Programming Manual

The STM32 Cortex-M4 instruction set
3.10.3

VCMP, VCMPE

Compares two floating-point registers, or one floating-point register and zero.
Syntax
VCMP{E}{cond}.F32 Sd, Sm
VCMP{E}{cond}.F32 Sd, #0.0
Where:
•
'cond' is an optional condition code, see
•
'E' If present, any NaN operand causes an Invalid Operation exception. Otherwise,
only a signaling NaN causes the exception.
•
'Sd' is the floating-point operand to compare.
• 'Sm' is the floating-point operand that is compared with
Operation
This instruction:
1. Compares:
Two floating-point registers.
One floating-point register and zero.
1. Writes the result to the FPSCR flags.
Restrictions
This instruction can raise an Invalid Operation exception if either operand is any type of
NaN. It always raises an Invalid
Condition flags
When this instruction writes the result to the FPSCR flags, the values are normally
transferred to the ARM flags by a subsequent VMRS instruction, see
Examples
VCMP.F32
VCMP.F32
152/260
Operation
S4, #0.0
S4, S2
DocID022708 Rev 6
Conditional execution on page
exception if either operand is a signaling NaN.
PM0214
64.
VMRS on page 168.