Ldr, Pc-Relative; Table 26. Label-Pc Offset Ranges - ST STM32F4 Series Programming Manual

The STM32 Cortex-M4 instruction set
3.4.5

LDR, PC-relative

Load register from memory.
Syntax
LDR{type}{cond} Rt, label
LDRD{cond} Rt, Rt2, label; load two words
Where:
•
'type' is one of the following:
B: Unsigned byte, zero extends to 32 bits.
SB: Signed byte, sign extends to 32 bits.
H: Unsigned halfword, sign extends to 32 bits.
SH: Signed halfword, sign extends to 32 bits.
—: Omit, for word.
• 'cond' is an optional condition code, see
•
'Rt' is the register to load or store.
• 'Rt2' is the second register to load or store.
•
'label' is a PC-relative expression, see
Operation
LDR loads a register with a value from a PC-relative memory address.
The memory address is specified by a label or by an offset from the PC.
The value to load or store can be a byte, halfword, or word. For load instructions, bytes and
halfwords can either be signed or unsigned (see
'label' must be within a limited range of the current instruction.
offsets between label and the PC. You might have to use the .W suffix to get the maximum
offset range (see
Word, halfword, signed halfword, byte, signed byte
Two words
Restrictions
In these instructions:
•
Rt2 must be neither SP nor PC
•
Rt must be different from Rt2
•
Rt can be SP or PC only for word loads
•
When Rt is PC in a word load instruction: bit[0] of the loaded value must be 1 for
correct execution, and a branch occurs to this halfword-aligned address. If the
instruction is conditional, it must be the last instruction in the IT block.
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Instruction width selection on page

Table 26. label-PC offset ranges

Instruction type
DocID022708 Rev 6
Conditional execution on page
PC-relative expressions on page
Address alignment on page
Table 26
67).
− 4095 to 4095
− 1020 to 1020
PM0214
64.
64.
64).
shows the possible
Offset range