Vector Table Offset Register (Vtor) - ST STM32F4 Series Programming Manual

Core peripherals
4.4.4

Vector table offset register (VTOR)

Address offset: 0x08
Reset value: 0x0000 0000
Required privilege: Privileged
31 30 29 28
Reserved
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15 14 13 12
TBLOFF[15:9]
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Bits 31:30 Reserved, must be kept cleared
Bits 29:9 TBLOFF: Vector table base offset field.
It contains bits [29:9] of the offset of the table base from memory address 0x00000000. When
setting TBLOFF, you must align the offset to the number of exception entries in the vector
table. The minimum alignment is 128 words. Table alignment requirements mean that bits[8:0]
of the table offset are always zero.
Bit 29 determines whether the vector table is in the code or SRAM memory region.
0: Code
1: SRAM
Note: Bit 29 is sometimes called the TBLBASE bit.
Bits 8:0 Reserved, must be kept cleared
226/260
27 26 25 24
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11 10 9 8
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DocID022708 Rev 6
23 22 21 20
TBLOFF[29:16]
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7 6 5 4
Reserved
PM0214
19 18 17 16
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3 2 1 0