ST STM32F4 Series Programming Manual page 54

The STM32 Cortex-M4 instruction set
Mnemonic
STRD
STREX
STREXB
STREXH
STRH,
STRHT
STRT
SUB, SUBS
SUB, SUBW {Rd,} Rn, #imm12
SVC
SXTAB
SXTAB16
SXTAH
SXTB16
SXTB
SXTH
TBB
TBH
TEQ
TST
UADD16
UADD8
USAX
UHADD16
UHADD8
UHASX
UHSAX
UHSUB16
UHSUB8
UBFX
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Table 20. Cortex-M4 instructions (continued)
Operands
Rt, Rt2, [Rn, #offset] Store register two words
Rd, Rt, [Rn, #offset] Store register exclusive
Rd, Rt, [Rn] Store register exclusive byte
Store register exclusive
Rd, Rt, [Rn]
halfword
Rt, [Rn, #offset] Store register halfword
Rt, [Rn, #offset] Store register word
{Rd,} Rn, Op2 Subtract
Subtract
#imm Supervisor call
{Rd,} Rn, Rm,{,ROR
Extend 8 bits to 32 and add
#}
{Rd,} Rn, Rm,{,ROR Dual extend 8 bits to 16 and
#} add
{Rd,} Rn, Rm,{,ROR
Extend 16 bits to 32 and add
#}
{Rd,} Rm {,ROR #n} Signed extend byte 16
{Rd,} Rm {,ROR #n} Sign extend a byte
{Rd,} Rm {,ROR #n} Sign extend a halfword
[Rn, Rm] Table branch byte
[Rn, Rm, LSL #1] Table branch halfword
Rn, Op2 Test equivalence
Rn, Op2 Test
{Rd,} Rn, Rm Unsigned add 16
{Rd,} Rn, Rm Unsigned add 8
Unsigned subtract and add
{Rd,} Rn, Rm
with exchange
{Rd,} Rn, Rm Unsigned halving add 16
{Rd,} Rn, Rm Unsigned halving add 8
Unsigned halving add and
{Rd,} Rn, Rm
subtract with exchange
Unsigned halving subtract and
{Rd,} Rn, Rm
add with exchange
{Rd,} Rn, Rm Unsigned halving subtract 16
{Rd,} Rn, Rm Unsigned halving subtract 8
Rd, Rn, #lsb, #width Unsigned bit field extract
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— 3.4.2 on page 70
— 3.4.8 on page 78
— 3.4.8 on page 78
— 3.4.8 on page 78
— 3.4 on page 68
— 3.4 on page 68
N,Z,C,V 3.5.1 on page 82
N,Z,C,V 3.5.1 on page 82
3.11.10 on page
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189
— 3.8.3 on page 136
— 3.8.3 on page 136
— 3.8.3 on page 136
— 3.8.2 on page 135
— 3.9.3 on page 140
— 3.9.3 on page 140
— 3.9.8 on page 146
— 3.9.8 on page 146
N,Z,C 3.5.9 on page 92
N,Z,C 3.5.9 on page 92
GE 3.5.16 on page 99
GE 3.5.16 on page 99
GE 3.5.17 on page 100
— 3.5.18 on page 101
— 3.5.18 on page 101
— 3.5.19 on page 102
— 3.5.19 on page 102
— 3.5.20 on page 103
— 3.5.20 on page 103
— 3.9.2 on page 139