Table 16. Properties Of The Different Exception Types - ST STM32F4 Series Programming Manual

PM0214
Bus fault
Usage fault
SVCall
PendSV
SysTick
Interrupt (IRQ)
Exception IRQ
(1)
number number
1 -
2 -14
3 -13
4 -12
5 -11
6 -10
7-10 -
11 -5
12-13 -
14 -2
A bus fault is an exception that occurs because of a memory related
fault for an instruction or data memory transaction. This might be from
an error detected on a bus in the memory system.
A usage fault is an exception that occurs in case of an instruction
execution fault. This includes:
•
An undefined instruction
•
An illegal unaligned access
•
Invalid state on instruction execution
•
An error on exception return.
The following can cause a usage fault when the core is configured to
report it:
• An unaligned address on word and halfword memory access
•
Division by zero
A supervisor call (SVC) is an exception that is triggered by the SVC
instruction. In an OS environment, applications can use SVC
instructions to access OS kernel functions and device drivers.
PendSV is an interrupt-driven request for system-level service. In an
OS environment, use PendSV for context switching when no other
exception is active.
A SysTick exception is an exception the system timer generates when
it reaches zero. Software can also generate a SysTick exception. In an
OS environment, the processor can use this exception as system tick.
An interrupt, or IRQ, is an exception signalled by a peripheral, or
generated by a software request. All interrupts are asynchronous to
instruction execution. In the system, peripherals use interrupts to
communicate with the processor.

Table 16. Properties of the different exception types

Exception
(1)
type
Reset
NMI
Hard fault
Memory
management fault
Bus fault
Usage fault
-
SVCall
-
PendSV
DocID022708 Rev 6
Vector address
Priority
or offset
-3, the highest 0x00000004
-2 0x00000008
-1 0x0000000C
(3)
Configurable 0x00000010
(3)
Configurable 0x00000014
(3)
Configurable 0x00000018
- Reserved
(3)
Configurable 0x0000002C
- Reserved
(3)
Configurable 0x00000038
The Cortex-M4 processor
Activation
(2)
Asynchronous
Asynchronous
-
Synchronous
Synchronous when precise
Asynchronous when imprecise
Synchronous
-
Synchronous
-
Asynchronous
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