ST STM32F4 Series Programming Manual page 196

Cortex-m4
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Core peripherals
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
BIC R2, R2, #1
STRH R2, [R0, #0x8]
STR R4, [R0, #0x4]
STRH R3, [R0, #0xA]
ORR R2, #1
STRH R2, [R0, #0x8]
Software must use memory barrier instructions:
Before MPU setup if there might be outstanding memory transfers, such as buffered
writes, that might be affected by the change in MPU settings
After MPU setup if it includes memory transfers that must use the new MPU settings.
However, memory barrier instructions are not required if the MPU setup process starts by
entering an exception handler, or is followed by an exception return, because the exception
entry and exception return mechanism cause memory barrier behavior.
Software does not need any memory barrier instructions during MPU setup, because it
accesses the MPU through the PPB, which is a Strongly-Ordered memory region.
For example, if you want all of the memory access behavior to take effect immediately after
the programming sequence, use a DSB instruction and an ISB instruction:
A DSB is required after changing MPU settings, such as at the end of context switch.
An ISB is required if the code that programs the MPU region or regions is entered using
a branch or call. If the programming sequence is entered using a return from exception,
or by taking an exception, then you do not require an ISB.
Updating an MPU region using multi-word writes
You can program directly using multi-word writes, depending on how the information is
divided. Consider the following reprogramming:
LDR R0, =MPU_RNR
STR R1, [R0, #0x0]
STR R2, [R0, #0x4]
STR R3, [R0, #0x8]
Use an STM instruction to optimize this:
LDR R0, =MPU_RNR
STM R0, {R1-R3}
You can do this in two words for pre-packed information. This means that the RBAR
contains the required region number and had the VALID bit set to 1, see
address register (MPU_RBAR) on page
example in a boot loader:
196/260
; R3 = attributes
; R4 = address
; 0xE000ED98, MPU region number register
; Region Number
; Disable
; Region Size and Enable
; Region Base Address
; Region Attribute
; Enable
; Region Size and Enable
; R1 = region number
; R2 = address
; R3 = size, attributes in one
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Attribute, Size and Enable
; R1 = region number
; R2 = address
; R3 = size, attributes in one
; 0xE000ED98, MPU region number register
; Region Number, address, attribute, size and enable
202. Use this when the data is statically packed, for
DocID022708 Rev 6
PM0214
MPU region base

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