Vstr - ST STM32F4 Series Programming Manual

PM0214
3.10.28

VSTR

Floating-point Store.
Syntax
VSTR{cond}{.32} Sd, [Rn{, #imm}]
VSTR{cond}{.64} Dd, [Rn{, #imm}]
Where:
•
'cond' is an optional condition code, see
•
'32, 64' are the optional data size specifiers.
•
'Sd' is the source register for a singleword store.
•
'Dd' is the source register for a doubleword store.
•
'Rn' is the base register. The SP can be used.
•
'imm' is the + or - immediate offset used to form the address. Values are multiples of 4
in the range 0-1020. imm can be omitted, meaning an offset of +0.
Operation
This instruction stores a single extension register to memory, using an address from an
ARM core register, with an optional offset, defined in imm.
Restrictions
The restrictions are the use of PC for Rn is deprecated.
Condition flags
These instructions do not change the flags.
Conditional execution on page
DocID022708 Rev 6
The STM32 Cortex-M4 instruction set
64.
177/260
259