Bfc And Bfi - ST STM32F4 Series Programming Manual

Cortex-m4
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The STM32 Cortex-M4 instruction set
3.9.1

BFC and BFI

Bit Field Clear and Bit Field Insert.
Syntax
BFC{cond} Rd, #lsb, #width
BFI{cond} Rd, Rn, #lsb, #width
Where:
'cond' is an optional condition code, see
'Rd' is the destination register.
'Rn' is the source register.
'lsb' is the position of the least significant bit of the bitfield. lsb must be in the range 0 to
31.
'width' is the width of the bitfield and must be in the range 1 to 32-lsb.
Operation
BFC clears a bitfield in a register. It clears width bits in Rd, starting at the low bit position lsb.
Other bits in Rd are unchanged.
BFI copies a bitfield into one register from another register. It replaces width bits in Rd
starting at the low bit position lsb, with width bits from Rn starting at bit[0]. Other bits in Rd
are unchanged.
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not affect the flags.
Examples
BFC
BFI
138/260
R4, #8, #12
R9, R2, #8, #12
DocID022708 Rev 6
Conditional execution on page
; Clear bit 8 to bit 19 (12 bits) of R4 to 0
; Replace bit 8 to bit 19 (12 bits) of R9 with
; bit 0 to bit 11 from R2
PM0214
64.

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