Bit-Banding; Table 13. Sram Memory Bit-Banding Regions; Table 14. Peripheral Memory Bit-Banding Regions - ST STM32F4 Series Programming Manual

PM0214
2.2.5

Bit-banding

A bit-band region maps each word in a bit-band alias region to a single bit in the bit-band
region. The bit-band regions occupy the lowest 1 Mbyte of the SRAM and peripheral
memory regions.
The memory map has two 32 Mbyte alias regions that map to two 1 Mbyte bit-band regions:
•
Accesses to the 32 Mbyte SRAM alias region map to the 1 Mbyte SRAM bit-band
region, as shown in
•
Accesses to the 32 MB peripheral alias region map to the 1 MB peripheral bit-band
region, as shown in
Address
range
0x20000000-
SRAM bit-band region
0x200FFFFF
0x22000000-
SRAM bit-band alias
0x23FFFFFF
Address
range
0x40000000-
Peripheral
bit-band region
0x400FFFFF
0x42000000-
Peripheral
bit-band alias
0x43FFFFFF
Note: A word access to the SRAM or peripheral bit-band alias regions map to a single bit in the
SRAM or peripheral bit-band region.
Bit band accesses can use byte, halfword, or word transfers. The bit band transfer size
matches the transfer size of the instruction making the bit band access.
The following formula shows how the alias region maps onto the bit-band region:
bit_word_offset = (byte_offset x 32) + (bit_number x 4)
bit_word_addr = bit_band_base + bit_word_offset
Table 13
Table

Table 13. SRAM memory bit-banding regions

Memory
region
Direct accesses to this memory range behave as SRAM memory
accesses, but this region is also bit addressable through bit-band alias.
Data accesses to this region are remapped to bit band region. A write
operation is performed as read-modify-write. Instruction accesses are not
remapped.

Table 14. Peripheral memory bit-banding regions

Memory
region
Direct accesses to this memory range behave as peripheral memory
accesses, but this region is also bit addressable through bit-band
alias.
Data accesses to this region are remapped to bit-band region. A write
operation is performed as read-modify-write. Instruction accesses are
not permitted.
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Instruction and data accesses
Instruction and data accesses
The Cortex-M4 processor
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