Bitfield Instructions; Table 32. Instructions That Operate On Adjacent Sets Of Bits - ST STM32H7 Series Programming Manual

The STM32 Cortex-M4 instruction set
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not affect the flags.
Examples
SXTAH
UXTAB
3.9

Bitfield instructions

Table 32
Mnemonic
BFC
BFI
SBFX
SXTB
SXTH
UBFX
UXTB
UXTH
138/262
R4, R8, R6, ROR #16 ; Rotates R6 right by 16 bits, obtains bottom
; halfword, sign extends to 32 bits, adds R8,and
; writes to R4
R3, R4, R10 ; Extracts bottom byte of R10 and zero extends to 32
; bits, adds R4, and writes to R3.
shows the instructions that operate on adjacent sets of bits in registers or bitfields.

Table 32. Instructions that operate on adjacent sets of bits

Brief description
Bit field clear
Bit field insert
Signed bit field extract
Sign extend a byte
Sign extend a halfword
Unsigned bit field extract
Zero extend a byte
Zero extend a halfword
BFC and BFI on page 139
BFC and BFI on page 139
SBFX and UBFX on page 140
SXT and UXT on page 141
SXT and UXT on page 141
SBFX and UBFX on page 140
SXT and UXT on page 141
SXT and UXT on page 141
PM0214 Rev 9
PM0214
See