Xilinx RocketIO User Manual page 77

Other Important Design Notes
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide
// This module reads RXDATA[31:0] from a RocketIO transceiver
// and copies it to
// its output, realigning it if necessary so that commas
// are aligned to the MSB position
// [31:24]. The module assumes ALIGN_COMMA_MSB is TRUE,
// so that the comma
// is already aligned to [31:24] or [15:8].
//
// Outputs
//
// aligned_data[31:0] -- Properly aligned 32-bit ALIGNED_DATA
// sync -- Indicator that aligned_data is properly aligned
// aligned_rxisk[3:0] - poperly aligned 4 bit RXCHARISK
// Inputs - These are all RocketIO inputs or outputs
// as indicated:
//
// usrclk2 -- RXUSRCLK2
// rxreset -- RXRESET
// rxisk[3:0] RXCHARISK[3:0]
// rxdata[31:0] RXDATA[31:0] -- (commas aligned to
//
// rxrealign -- RXREALIGN
// rxcommadet -- RXCOMMADET
// rxchariscomma3 -- RXCHARISCOMMA[3]
// rxchariscomma1 -- RXCHARISCOMMA[1]
//
module align_comma_32 ( aligned_data, aligned_rxisk, sync,
output [31:0] aligned_data;
output [3:0] aligned_rxisk;
output sync;
reg [31:0] aligned_data;
reg sync;
input usrclk2;
input rxreset;
input [31:0] rxdata;
input [3:0] rxisk;
input rxrealign;
input rxcommadet;
input rxchariscomma3;
input rxchariscomma1;
reg [15:0] rxdata_reg;
reg [1:0] rxisk_reg;
reg [3:0] aligned_rxisk;
reg byte_sync;
reg [3:0] wait_to_sync;
reg count;
// This process maintains wait_to_sync and count,
// which are used only to
// maintain output sync; this provides some idea
// of when the output is properly
// aligned, with the comma in aligned_data[31:24].
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[31:24] or [15:8])
usrclk2, rxreset,
rxdata, rxisk,
rxrealign, rxcommadet,
rxchariscomma3, rxchariscomma1 );
R
The
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