Xilinx RocketIO User Manual page 10

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Figure 4-10: Single-Ended Trace Geometry............................................................................. 92
Figure 4-11: Microstrip Edge-Coupled Differential Pair ...................................................... 93
Figure 4-12: Stripline Edge-Coupled Differential Pair ......................................................... 93
Figure 4-13: AC-Coupled Serial Link ....................................................................................... 93
Figure 4-14: DC-Coupled Serial Link ....................................................................................... 94
Figure 4-15: LVPECL Reference Clock Oscillator Interface................................................. 94
Figure 4-16: LVDS Reference Clock Oscillator Interface ..................................................... 94
Chapter 5: Simulation and Implementation
Figure 5-1: 2VP2 Implementation.............................................................................................. 98
Figure 5-2: 2VP50 Implementation............................................................................................ 98
Appendix A: RocketIO Transceiver Timing Model
Figure A-1: RocketIO Transceiver Block Diagram .............................................................. 104
Appendix B: RocketIO Transceiver Cell Models
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www.xilinx.com
1-800-255-7778
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide

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