Crc Latency; Crc Limitations; Crc Modes; User_Mode - Xilinx RocketIO User Manual

CRC Operation
The transmitter computes 4-byte CRC on the packet data between the SOP and EOP
(excluding the CRC placeholder bytes). The transmitter inserts the computed CRC just
before the EOP. The transmitter modifies trailing Idles or EOP if necessary to generate
correct running disparity for Gigabit Ethernet and FibreChannel. The receiver recomputes
CRC and verifies it against the inserted CRC.
generation. The empty boxes are only used in certain protocols (Ethernet). The user logic
must create a four-byte placeholder for the CRC; otherwise, data is overwritten.
...
SOP

CRC Latency

Enabling CRC increases the transmission latency from TXDATA to TXP and TXN. The
enabling of CRC does not affect the latency from RXP and RXN to RXDATA. The typical
and maximum latencies, expressed in TXUSRCLK/RXUSRCLK cycles, are shown in
Table
Virtex-II Pro Data Sheet.

Table 3-15: Effects of CRC on Transceiver Latency

CRC Limitations

There are several limitations to the RocketIO CRC. First, CRC is not supported in byte-
striped data. If byte-striped (channel bonding) is required, CRC must be computed in
CLBs prior to the byte-striping. The CRC support of Infiniband is incomplete, because the
16-bit variant CRC must be done in the CLBs making the transceiver core CRC function
redundant. For this case, set TX_CRC_USE = FALSE.

CRC Modes

The RocketIO transceiver has four CRC modes: USER_MODE, FIBRECHANNEL,
ETHERNET, and INFINIBAND. These CRC modes are briefly explained below.

USER_MODE

USER_MODE is the simplest CRC methodology. The CRC checks for the SOP and EOF,
calculates CRC on the data, and leaves the four remainders directly before the EOP. The
CRC form for the user-defined mode is shown in
asserting RXCHECKINGCRC and RXCRCERR High with respect to the incoming data.
TXCRCFORCEERR and RXCRCERR are both useful during testing. When using CRC,
testing the CRC logic can be done by setting CRCFORCEERR High to incorporate an error
into the data that is transmitted. When the data is received in a testing mode, such as serial
loopback, the data is "corrupted" and the receiver should signal an error with the use of
RXCRCERR when the RXCHECKINGCRC is asserted High. User logic determines the
procedure when a RXCRCERR occurs.
NOTE: Data must be a minimum of 16 bytes for user mode CRC generation.
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide
Data

Figure 3-14: CRC Packet Format

3-15. For timing diagrams expressing these relationships, please see Module 3 of the
TXDATA to TXP and TXN,
in TXUSRCLK Cycles
Typical
CRC Disabled
CRC Enabled
www.xilinx.com
1-800-255-7778
Figure 3-14
...
CRC
4 Bytes
Maximum
8 11
14 17
Figure
shows the packet format for CRC
...
EOP
UG024_07_021102
RXP and RXN to RXDATA,
in RXUSRCLK Cycles
Typical Maximum
25 42
25 42
3-15, along with the timing for
R
Idle
71