Xilinx RocketIO User Manual page 12

R
Table 4-4: CDR Parameters ......................................................................................................... 88
Table 4-5: Transceiver Power Supplies .................................................................................... 89
Chapter 5: Simulation and Implementation
Table 5-1: LOC Grid & Package Pins Correlation for FG256, FG456, and FF672 ............. 99
Table 5-2: LOC Grid & Package Pins Correlation for FF896 and FF1152 ........................... 99
Table 5-3: LOC Grid & Package Pins Correlation for FF1517 and FF1704 ....................... 100
Table 5-4: LOOPBACK Modes................................................................................................. 102
Appendix A: RocketIO Transceiver Timing Model
Table A-1: RocketIO Clock Descriptions ............................................................................... 103
Table A-2: Parameters Relative to the RX User Clock (RXUSRCLK) ............................... 106
Table A-3: Parameters Relative to the RX User Clock2 (RXUSRCLK2) ........................... 106
Table A-4: Parameters Relative to the TX User Clock2 (TXUSRCLK2)............................ 107
Table A-5: Miscellaneous Clock Parameters ......................................................................... 107
Appendix B: RocketIO Transceiver Cell Models
12 www.xilinx.com
1-800-255-7778
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide