Xilinx RocketIO User Manual page 26

R
Table 3-1: GT_CUSTOM
GT_INFINIBAND, and GT_XAUI Primitive Ports (Continued)
Port
POWERDOWN
REFCLK
REFCLK2
REFCLKSEL
RXBUFSTATUS
(3)
RXCHARISCOMMA
(3)
RXCHARISK
RXCHECKINGCRC
RXCLKCORCNT
RXCOMMADET
RXCRCERR
(3)
RXDATA
RXDISPERR
RXLOSSOFSYNC
(4)
RXN
(3)
RXNOTINTABLE
(4)
RXP
26
(1)
, GT_AURORA, GT_FIBRE_CHAN
Port
I/O
Size
I 1 Shuts down both the receiver and transmitter sides of the transceiver when
asserted High. This decreases the power consumption while the
transceiver is shut down. This input is asynchronous.
I 1 High-quality reference clock driving transmission (reading TX FIFO, and
multiplied for parallel/serial conversion) and clock recovery. REFCLK
frequency is accurate to ± 100 ppm. This clock originates off the device, is
routed through fabric interconnect, and is selected by the REFCLKSEL.
I 1 An alternative to REFCLK. Can be selected by the REFCLKSEL.
I 1 Selects the reference clock to use REFCLK or REFCLK2. Deasserted is
REFCLK. Asserted is REFCLK2.
O 2 Receiver elastic buffer status. Bit 1 indicates if an overflow/underflow
error has occurred when asserted High. Bit 0 indicates if the buffer is at
least half-full when asserted High.
O 1, 2, 4 Similar to RXCHARISK except that the data is a comma.
O 1, 2, 4 If 8B/10B decoding is enabled, it indicates that the received data is a "K"
character when asserted High. Included in Byte-mapping. If 8B/10B
decoding is bypassed, it remains as the first bit received (Bit "a") of the
10-bit encoded data (see
O 1 CRC status for the receiver. Asserts High to indicate that the receiver has
recognized the end of a data packet. Only meaningful if RX_CRC_USE =
TRUE.
O 3 Status that denotes occurrence of clock correction or channel bonding. This
status is synchronized on the incoming RXDATA. See
Count, page
O 1 Signals that a comma has been detected in the data stream.
O 1 Indicates if the CRC code is incorrect when asserted High. Only
meaningful if RX_CRC_USE = TRUE.
O 8,16,32 Up to four bytes of decoded (8B/10B encoding) or encoded (8B/10B
bypassed) receive data.
O 1, 2, 4 If 8B/10B encoding is enabled it indicates whether a disparity error has
occurred on the serial line. Included in Byte-mapping scheme.
O 2 Status related to byte-stream synchronization (RX_LOSS_OF_SYNC_FSM)
If RX_LOSS_OF_SYNC_FSM = TRUE, this outputs the state of the FSM.
Bit 1 signals a loss of sync.
Bit 0 indicates a resync state.
If RX_LOSS_OF_SYNC_FSM = FALSE, this indicates if received data is
invalid (Bit 1) and if the channel bonding sequence is recognized (Bit 0).
I 1 Serial differential port (FPGA external)
O 1, 2, 4 Status of encoded data when the data is not a valid character when
asserted High. Applies to the byte-mapping scheme.
I 1 Serial differential port (FPGA external)
Chapter 3: Digital Design Considerations
(2)
, GT_ETHERNET
Definition
Figure 3-11).
56.
www.xilinx.com
1-800-255-7778
(2)
,
Clock Correction
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide