Summary; Verilog Module Declarations; Gt_Aurora_1 - Xilinx RocketIO User Manual

R
RocketIO Transceiver Cell Models

Summary

This appendix documents the RocketIO™ Multi-Gigabit Transceiver cell models. The
following information lists the Verilog module declarations of the model and pins
associated with each of the RocketIO communication standards available in the
Virtex-II Pro family.

Verilog Module Declarations

GT_AURORA_1

UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide
module GT_AURORA_1 (
CHBONDDONE,
CHBONDO,
CONFIGOUT,
RXBUFSTATUS,
RXCHARISCOMMA,
RXCHARISK,
RXCHECKINGCRC,
RXCLKCORCNT,
RXCOMMADET,
RXCRCERR,
RXDATA,
RXDISPERR,
RXLOSSOFSYNC,
RXNOTINTABLE,
RXREALIGN,
RXRECCLK,
RXRUNDISP,
TXBUFERR,
TXKERR,
TXN,
TXP,
TXRUNDISP,
CHBONDI,
CONFIGENABLE,
CONFIGIN,
ENCHANSYNC,
LOOPBACK,
POWERDOWN,
REFCLK,
REFCLK2,
REFCLKSEL,
BREFCLK,
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Appendix B
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