Figure 3-9: 8B/10B Data Flow; Table 3-12: 8B/10B Bypassed Signal Significance - Xilinx RocketIO User Manual

R
32/16/8 bits
TXDATA
40 – 156.3 MHz
32/16/8 bits
RXDATA

Table 3-12: 8B/10B Bypassed Signal Significance

TXBYPASS8B10B
TXCHARDISPMODE,
TXCHARDISPVAL
RXCHARISK
RXRUNDISP
58
Transceiver Module
Physical Coding Sublayer
C
8B/10B
R
Encode
C
REFCLK
Channel Bonding
and
Clock Correction
CRC
8B/10B
Elastic
Buffer Decode

Figure 3-9: 8B/10B Data Flow

8B/10B encoding is enabled (not bypassed)
0
8B/10B encoding bypassed (disabled)
1
Function, 8B/10B Enabled
Maintain running disparity normally
00
Invert the normally generated running
01
disparity before encoding this byte.
Set negative running disparity before
10
encoding this byte.
Set positive running disparity before
11
encoding this byte.
Received byte is a K-character
Indicates running disparity is
0
NEGATIVE
Indicates running disparity is
1
POSITIVE
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Chapter 3: Digital Design Considerations
Physical Media Attachment
Mindspeed IP
F
I
Serializer
F
O
TX Clock Generator
Transmitter
20X Multiplier
Receiver
RX Clock Recovery
Deserializer
Comma Detect
Function
Function, 8B/10B Bypassed
Part of 10-bit encoded byte
(see Figure
TXCHARDISPMODE[0],
( or: [1] / [2] / [3] )
TXCHARDISPVAL[0],
( or: [1] / [2] / [3] )
TXDATA[7:0]
( or: [15:8] / [23:16] / [31:24] )
Part of 10-bit encoded byte
(see Figure
RXCHARISK[0],
( or: [1] / [2] / [3] )
RXRUNDISP[0],
( or: [1] / [2] / [3] )
RXDATA[7:0]
( or: [15:8] / [23:16] / [31:24] )
TX+
Transmit
Buffer TX−
Receive
RX+
Buffer
RX−
UG024_09_020802
3-10):
3-11):
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide