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12.00
11.50
11.00
10.50
10.00
9.50
9.00
8.50
8.00
7.50
7.00
Figure 11-6. 3.3V Tolerant Group Derating Curve
Table 11-14. Reset Conditions A.C. Specifications
T#
Parameter
T16: Reset Configuration Signals (A[14:5]#,
BR0#, FLUSH#, INIT#) Setup Time
T17: Reset Configuration Signals (A[14:5]#,
BR0#, FLUSH#, INIT#) Hold Time
T18: Reset Configuration Signals (A20M#,
IGNNE#, LINT[1:0]#) Setup Time
T19: Reset Configuration Signals (A20M#,
IGNNE#, LINT[1:0]#) Delay Time
T20: Reset Configuration Signals (A20M#,
IGNNE#, LINT[1:0]#) Hold Time
NOTE:
1. For a reset, the clock ratio defined by these signals must be a safe value (their final or lower multiplier)
within this delay unless PWRGOOD is being driven inactive.
0
5
10
15
20
Min
4
2
1
2
ELECTRICAL SPECIFICATIONS
25
30
35
40
45
pF
Max
Unit
Figure
BCLKs
11-12
20
BCLKs
11-12
ms
11-12
5
BCLKs
11-12
20
BCLKs
11-12
11-13
50
Notes
Before
deassertion of
RESET#
After clock that
deasserts
RESET#
Before
deassertion of
RESET#
After assertion of
RESET# 1
After clock that
deasserts
RESET#
11-21
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