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SIGNALS REFERENCE
If DEFER# is inactive, or HITM# is active, then the transaction is committed for in-order com-
pletion and snoop ownership is transferred normally between the requesting agent, the snooping
agents, and the response agent.
If DEFER# is active with HITM# inactive, the transaction commitment is deferred. If the defer
agent completes the transaction with a retry response, the requesting agent must retry the trans-
action. If the defer agent returns a deferred response, the requesting agent must freeze snoop
state transitions associated with the deferred transaction and issues of new order-dependent
transactions until the corresponding deferred reply transaction. In the meantime, the ownership
of the deferred address is transferred to the defer agent and it must guarantee management of
conflicting transactions issued to the same address.
If DEFER# is active in response to a newly issued bus-lock transaction, the entire bus-locked
operation is re-initiated regardless of HITM#. This feature is useful for a bridge agent in re-
sponse to a split bus-locked operation. It is recommended that the bridge agent extend the Snoop
Phase of the first transaction in a split locked operation until it can either guarantee ownership
of all system resources to enable successful completion of the split sequence or assert DEFER#
followed by a Retry Response to abort the split sequence.
A.1.21. DEN# (I/0)
The DEN# signal is the defer-enable signal. It is driven to the bus on the second clock of the
Request Phase on the EXF1#/Ab4# pin. DEN# is asserted to indicate that the transaction can be
deferred by the responding agent.
A.1.22. DEP[7:0]# (I/O)
The DEP[7:0]# signals are the data bus ECC protection signals. They are driven during the Data
Phase by the agent responsible for driving D[63:0]#. The DEP[7:0]# signals provide optional
ECC protection for the data bus. During power-on configuration, DEP[7:0]# signals can be en-
abled for either ECC checking or no checking.
The ECC error correcting code can detect and correct single-bit errors and detect double-bit or
nibble errors. Chapter 8, Data Integrity provides more information about ECC.
DEP[7:0]# provide valid ECC for the entire data bus on each data clock, regardless of which
bytes are valid. If checking is enabled, receiving agents check the ECC signals for all 64 data
signals.
A.1.23. DID[7:0]# (I/O)
The DID[7:0]# signals are Deferred Identifier signals. They are transferred using A[23:16]# sig-
nals by the request initiator. They are transferred on Ab[23:16]# during the second clock of the
Request Phase on all transactions, but only defined for deferrable transactions (DEN# asserted).
DID[7:0]# is also transferred on Aa[23:16]# during the first clock of the Request Phase for De-
ferred Reply tranactions.
A-11
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