9.1.19. Low Power Standby Enable; Table 9-3. Arbitration Id Configuration - Intel Pentium Pro Family Developer's Manual

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CONFIGURATION
If FRC is used, then two physical processors are combined to create a single logical processor.
Processors with agent ID 0 and 2 are designated as FRC-masters and use their agent ID as their
parallel bus arbitration ID. Processors with agent ID 1 and 3 are designated as FRC checkers for
processors 0 and 2 respectively and assume the characteristics of their respective masters as
shown in Table 9-3.
BR0#
BR1#
L 1
H
H
H
H
H
H
L
L
H
H
H
H
H
H
L
NOTE:
1. L and H designate electrical levels.

9.1.19. Low Power Standby Enable

A configuration register bit which enables distribution of the core clock during AUTOHalt and
Stop Grant mode has been included in the power-on configuration register. This register will
support bit D26, which can be read and written by software.
— D26=1
In this mode when the Pentium Pro processor enters AUTOHalt or Stop Grant, it will
not distribute a clock to its core units. This allows the Pentium Pro processor to reduce
its standby power consumption, but large current transients are produced upon entering
and exiting this mode.
— D26=0 (Default)
In this mode, AUTOHalt and Stop Grant will not stop internal clock distribution. The
Pentium Pro processor will have higher standby power consumption, but will produce
smaller current transients on entering and exiting this mode.
9-8

Table 9-3. Arbitration ID Configuration

BR2#
H
H
L
H
H
H
L
H
BR3#
A5#
H
H
L
L
H
H
H
H
H
L
L
L
H
L
H
L
Arb Id
0
1
2
3
0
0
2
2

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