Request Stall States; Bnr# Sampling; Arbitration Protocol Description; Symmetric Arbitration Of A Single Agent After Reset - Intel Pentium Pro Family Developer's Manual

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4.1.3.2.1.

Request Stall States

The request stall protocol can be described using three states: The "free" state in which transac-
tions can be driven to the bus normally, one every 3 clocks, the "stalled" state in which no trans-
actions are driven to the bus, and the "throttled" state in which one transaction may be driven to
the bus. The throttled state is a temporary state which will transition to either free or stalled at
the next sample point.
If BNR# is always active when sampled, then no transactions are driven to the bus because all
agents remain in the stalled state.
To get to the free state where transactions are driven normally to the bus (a maximum of one
ADS# every three clocks), BNR# must be sampled inactive on two consecutive sample points.
The existence of the throttled state enables one transaction to be sent to the bus every time BNR#
is sampled deasserted. When the processor is in the throttled state, one transaction can be driven
to the bus. The throttled state is a temporary state.
4.1.3.2.2.

BNR# Sampling

BNR# is deasserted with RESET# and BINIT#. After RESET#, BNR# is first sampled 2 clocks
after RESET# is sampled deasserted. After BINIT#, BNR# is first sampled 4 clocks after
BINIT# is sampled asserted. BNR# is a wired-OR signal and must not be driven active for two
consecutive clocks, if it is asserted in one clock, it must be deasserted in the next clock.
BNR# has two sampling modes. It is sampled every other clock while in the stalled or throttled
state, and it is sampled in the third clock after ADS# is sampled asserted in the free state.
BNR# must be driven active only during a valid sampling window and should be deasserted in
the following clock. Bus agents must ignore BNR# in the clock after a valid sampling window.
4.1.4.

Arbitration Protocol Description

This section describes the arbitration protocol using examples. For reference, Section 4.1.5.,
"Symmetric Agent Arbitration Protocol Rules" through Section 4.1.7., "Bus Lock Protocol
Rules" list the rules.
4.1.4.1.

SYMMETRIC ARBITRATION OF A SINGLE AGENT AFTER RESET#

Figure 4-2 illustrates bus arbitration initiated after a reset sequence. BREQ[3:0]#, BPRI#,
LOCK#, and BNR# must be deasserted during RESET#. (BREQ0# is asserted 2 clocks before
RESET# is deasserted for initialization reasons as described in Section 4.1.2., "Bus Signals".)
Symmetric agents can begin arbitration after BIST and MP initialization by driving the
BREQ[3:0]# signals. Once ownership is obtained, the symmetric owner can park on the bus as
long as no other symmetric agent is requesting it. The symmetric owner can voluntarily release
the bus to idle.
BUS PROTOCOL
4-5

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