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Hold time for GTL+, T
HOLD
The minimum time from the clock pin of the receivers crossing of the 1.5 V
level to the receiver input signal pin crossing of V
the input buffer has captured new data at the receiver input signal pin, given
an infinite setup time.
Strictly speaking, hold time must be determined when the input barely meets minimum setup
time (see definition of setup time above). However, for current GTL+ systems, setup time is ex-
pected to be met, well beyond the minimum required in cases where hold is critical. This is be-
cause hold is critical when the receiver is very close to the driver. In such cases, the signal will
arrive at the receiver shortly after the clock, hence meeting setup time with comfortable margin.
The recommended procedure for extracting T
steps, it would be beneficial that any such extra steps be documented with the results of this re-
ceiver characterization:
The full receiver circuit must be used, comprising the input differential amplifier, any
•
shaping logic gates, and the edge-triggered (or pulse-triggered) flip-flop. The output of the
flip-flop must be monitored.
The receiver's Lo-to-Hi hold time should be determined using a nominal input waveform
•
that starts at V
IN_LOW_MAX
0.8V/ns, with the process, temperature, voltage, and V
the fastest (or best) corner values (yielding the longest T
(system) reference voltage at the device pin. Due to tolerance in V
voltage divider generating system V
maximum of ±122 mV. When determining hold time, the internal reference voltage
V
(at the reference gate of the diff. amp.) must be set to the value which
REF_INTERNAL
yields the worst case hold time. Here, V
Where, V
is the net maximum differential noise amplitude on the component's
NOISE
internal V
distribution bus (at the amplifier's reference input gate) comprising noise
REF
picked up by the connection from the V
Analogously, for the hold time of Hi-to-Lo transitions, the input starts at V
•
V
+200 mV and drops to < 0.5 V at the rate of 3V/ns.
REF
12.2.3.3.
RECEIVER RINGBACK TOLERANCE
Refer to Section 12.1.3.1., "Ringback Tolerance" for a complete description of the definitions
and methodology for determining receiver ringback tolerance.
, is defined as:
is outlined below. If one employs additional
HOLD
(V
- 200 mV) and goes to V
REF
from V
REF
TT
REF_INTERNAL
package pin to the input of the amp.
REF
GTL+ INTERFACE SPECIFICATION
, which guarantees that
REF
, at a fast edge rate of
TT
of the receiver set to
REF_INTERNAL
). Here, V
HOLD
REF
(1.5V, ±10%) and the
TT
(±2%), V
can shift around 1V by a
REF
= V
±(122 mV +V
REF
IN_HIGH_MIN
is the external
).
NOISE
=
12-21
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