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PENTIUM® PRO PROCESSOR TEST ACCESS PORT (TAP)
Exit2-DR: This is a temporary state. All registers retain their previous values.
•
Update-DR: Data from the shift register path is loaded into the latched parallel outputs of
•
the selected Data Register (if applicable) on the falling edge of TCK. This (and Test-Logic-
Reset) is the only state in which the latched paralleled outputs of a data register can
change.
10.2.1. Accessing the Instruction Register
Figure 10-3 shows the (simplified) physical implementation of the Pentium Pro processor TAP
instruction register. This register consists of a 6-bit shift register (connected between TDI and
TDO), and the actual instruction register (which is loaded in parallel from the shift register). The
parallel output of the TAP instruction register goes to the TAP instruction decoder, shown in
Figure 10-1. This architecture conforms to the 1149.1 specification.
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
A A
A A
A A
A A
A
A A
A A
A A
A
A
A
A A
A A
TDI
A A
A A
A
A A
A A
A A
A
A
A A
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Figure 10-3. Pentium
Figure 10-4 shows the operation of the TAP instruction register during the Capture-IR, Shift-IR
and Update-IR states of the TAP controller. Flip-flops within the instruction register which are
updated in each mode of operation are shaded. In Capture-IR, the shift register portion of the
instruction register is loaded in parallel with the fixed value "000001." In Shift-IR, the shift reg-
ister portion of the instruction register forms a serial data path between TDI and TDO. In Up-
date-IR, the shift register contents are latched in parallel into the actual instruction register. Note
that the only time the outputs of the actual instruction register change is during Update-IR.
Therefore, a new instruction shifted into the Pentium Pro processor TAP does not take effect un-
til the Update-IR state of the TAP controller is entered.
10-4
(MSB)
Parallel output
Actual Instruction Register
Shift Register
Fixed capture value
®
Pro Processor TAP instruction Register
(LSB)
AA AA
AA AA
AA AA
AA AA
AA
AA AA
AA AA
AA AA
AA
AA
AA
AA AA
AA AA
TDO
AA AA
AA AA
AA
AA AA
AA AA
AA AA
AA
AA
AA AA
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