Space Partitioning; Fig. 8-7-1 Address Format When Accessing External Memory; Table 8-7-1 Features Of Each Block - Panasonic MN103001G/F01K User Manual

Bus Controller (BC)

8.7 Space Partitioning

In extension memory mode (MMOD 1 to 0 = "LH"), the 1 GB memory space from x'80000000 to x'BFFFFFFF
becomes external memory space; in processor mode (MMOD 1 to 0 = "HL"), the 2 GB memory space from
x'40000000 to x'BFFFFFFF becomes external memory space. External memory space is partitioned into 4 blocks
(block 0 to block 3). When any of these blocks are accessed, various signals (such as CSn) corresponding to the
block in question are output. Fig. 8-7-1 shows the address format for external memory accesses, and Fig. 8-7-2
shows the memory map.
In addition, if it is necessary to extend the external memory space, extension address A23 (dual-purpose pin that is
shared with CS3) can be used to extend the memory space. (There is no portion for address extension for block 3.)
31
Address
Space partition

Fig. 8-7-1 Address Format When Accessing External Memory

In addition, the features of each block are described in Table 8-7-1. The various settings for each block are made
through the memory block 0 to 3 control registers and, when DRAM is connected, through the DRAM control
register.
Block DRAM Bus
connection width
Block 0 Not 8/16
permitted
Block 1 Permitted 8/16
Block 2 Permitted 8/16
Block 3 Not 8/16
Permitted
For details, refer to the descriptions of memory control registers 0A/B, 1A/B, 2A/B, and 3A/B in section 8.6,
"Description of Registers."
Note 1. Handshaking can only be used in synchronous mode.
2. Connected DRAM can only be used when address and data are separate.
8-26
30 29 28 27 26 25
unused
Block partition
00 : Block0
01 : Block1
10 : Block2
11 : Block3
00: Internal memory
01: Internal memory (when MMOD 1 to 0 = "LH"), External memory (when MMOD 1 to 0 = "HL")
10: External memory
11: Access prohibited

Table 8-7-1 Features of Each Block

Wait
Fixed
Fixed
Fixed/handshaking
Fixed/handshaking
24 23 22
unused
External address (8 MB space)
Extension address
Mode Output signal used for
block identification
Synchronous
/asynchronous
Synchronous CS1 or RAS1
/asynchronous
Synchronous CS2 or RAS2
/asynchronous
Synchronous
/asynchronous
0
Address data pins
separate/multiplex
CS0 Permitted
Permitted
Permitted
CS3 Permitted