Fig. 13-3-5 Timing Chart (15); Fig. 13-3-6 Timing Chart (16) - Panasonic MN103001G/F01K User Manual

Serial Interface
<Reception>
• One-byte transfer with 7-bit data length and parity on
SBI pin
SBT pin
SCnRXF flag
SCnRBF flag
Interrupt request
Data read
• Two-byte transfer with 8-bit data length and parity on
SBI pin
SBT pin
SCnRXF flag
SCnRBF flag
Interrupt request
Data read
After reception end (when the SCnRBF flag = "1"), the received data is fetched by reading the SCnRXB. In the
case of a 7-bit transfer, the MSB (bit 7) is "0".
The SCnRXF flag is set to "1" at the start of reception (at the falling edge of SBT pin), and is set to "0" at the end
of reception.
The SCnRBF flag is set to "1" at the end of reception, and is set to "0" when SCnRXB is read.
Sending dummy data makes it possible to receive data while supplying the clock from the microcomputer side. In
this case, interrupt requests are also generated by the transmission source. Receive data according to the following
procedure:
(1) Select the internal clock as the reference clock, and set the parity, character length, etc.
(2) Enable both the transmission operation and the receiving operation.
(3) When dummy data is written to the transmission buffer, the clock is sent and reception begins.
When using clock synchronous mode (2), set the SBO pin as a general-purpose input port before writing the
dummy data to the transmission buffer, and then reset the pin as the SBO pin after transmission is complete.
13-34
bp0 bp1 bp2 bp3

Fig. 13-3-5 Timing Chart (15)

bp0 bp1 bp2 bp3 bp4 bp5 bp6

Fig. 13-3-6 Timing Chart (16)

bp4 bp5 bp6 PTY
bp7 PTY bp0 bp1 bp2 bp3 bp4 bp5 bp6 bp7 PTY