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Group 15 interrupt control register
Register symbol: G15ICR
Address:
x'3400013C
Purpose:
This register is used to enable group 15 interrupts, and to confirm interrupt requests and detection.
Bit No.
15
14
Bit
-
G15
G15
name
LV2 LV1 LV0
Reset
0
0
Access
R
R/W R/W R/W
Bit No.
Bit name
0
IQ4ID
3 to 1
—
4
IQ4IR
7 to 5
—
8
IQ4IE
11 to 9
—
12
G15LV0
13
G15LV1
14
G15LV2
15
—
13
12
11
10
G15
-
-
0
0
0
0
R
R
R
Description
External interrupt 4 interrupt detection flag
0: No interrupt detected
"0" is returned when these bits are read.
External interrupt 4 interrupt request flag
0: No interrupt request
"0" is returned when these bits are read.
External interrupt 4 interrupt enable flag
0: Disabled
"0" is returned when these bits are read.
Group 15 interrupt priority level register (LSB)
Group 15 interrupt priority level register
Group 15 interrupt priority level register (MSB)
Set a level from 6 to 0.
"0" is returned when this bit is read.
9
8
7
6
5
-
IQ4
-
-
-
IE
0
0
0
0
0
R/W
R
R
R
1: Interrupt detected
1: Interrupt request
1: Enabled
Interrupt Controller
4
3
2
1
IQ4
-
-
-
IR
0
0
0
0
R/W
R
R
R
R/W
9-23
0
IQ4
ID
0
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