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Clock Generator
6.1 Overview
The CG has an internal PLL circuit; in addition to supplying clock pulses to this microcontroller at a frequency that
is a multiple of the oscillating frequency of the oscillator, the CG also supplies clock pulses with the same frequency
as the oscillating frequency of the oscillator, or that frequency divided by 2, to external devices.
6.2 Features
The features of the CG are described below.
Flexible clock control
- Supports self-excitation/external excitation
(input frequency: 8 MHz to 20 MHz)
Note: The in-circuit emulator (ICE) cannot operate with self-excited oscillators in the microcontroller.
- When PLL is being used, a clock that is a programmable multiple of the input frequency is supplied
as the CPU clock (MCLK). A clock that is 1/4 of MCLK is supplied as the peripheral clock
(IOCLK). A clock that is 1x the input frequency is output as the external device supply clock
(SYSCLK).
- When PLL is not being used, a clock that is 1/2 of the input frequency is supplied as the CPU clock
(MCLK) and as the external device supply clock (SYSCLK), and a clock that is 1/8 of the input
frequency is supplied as the peripheral clock (IOCLK).
6.3 Block Diagram
6-2
IOCLK (fio)
Clock Generator
OSCI
SYSCLK
(fsys)
When using PLL:
8 MHz to 18 MHz
When not using PLL:
8 MHz to 20 MHz
Fig. 6-3-1 Clock Generator
MCLK (fc)
(PLL built in)
of microcontroller
OSCO
CKSEL
fosci
Internal block
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