Panasonic MN103001G/F01K User Manual page 86

Panax series microcomputer
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Extension Instruction Specifications
SWAPH (Data swapping instruction [high-order to low-order and vice versa] in two-byte data)
[Instruction Format (Macro Name)]
SWAPH Dm, Dn
[Assembler Mnemonic]
udf09 Dm, Dn
[Operation]
This instruction swaps bits 15 through 8 of Dm with bits 7 through 0, and bits 31 through 24 with bits 23 through
16, and then stores the result in Dn.
Dm before execution
Bit 31
Dm[31:24]
MSB
Dn after execution
Bit 31
Dm[23:16]
MSB
The sample of execution
Before execution:
After execution:
[Flag Changes]
Flag
Change
V
*
C
*
N
*
Z
*
[Programming Cautions]
PSW updating by flag changes is delayed by one instruction.
However, Bcc and Lcc instructions can evaluate flags without waiting for flag reflection to PSW.
The operations of "udf09 imm8, Dn", "udf09 imm16, Dn" and "udf09 imm32, Dn" are not assured. In addition, a
system error interrupt does not occur in these cases.
3-30
Dm[23:16]
Dm[31:24]
0x12345678
0x34127856
Undefined
Undefined
Undefined
Undefined
Dm[15:8]
Dm[7:0]
Dm[7:0]
Dm[15:8]
Condition
Bit 0
LSB
Bit 0
LSB

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