Fig. 15-3-2 Port 1 Block Diagram (P11, And P10) - Panasonic MN103001G/F01K User Manual

Internal data bus
RWSEL(n=1),
AS(n=0)
Control Signal
from BC
D7 to D0
Output enable
signal
Address/data
multiplex mode
D1(n=1),
D0(n=0)
P1OUT
P1nO
P1DIR
P1nD
P1MD
P1M
P1PU
P1IN
P1nI

Fig. 15-3-2 Port 1 Block Diagram (P11, and P10)

M
P
X
M
P
X
M
P
M X
P
X
P... Represents one bit of each register.
I/O Ports
P1n
(n=1,0)
15-11