Group 3 interrupt control register
Register symbol: G3ICR
Address:
x'3400010C
Purpose:
This register is used to enable group 3 interrupts, and to confirm interrupt requests and detection.
Bit No.
15
14
Bit
-
G3
name
LV2 LV1 LV0
Reset
0
0
Access
R
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit No.
Bit name
0
TM4ID
1
TM5ID
2
TM6ID
3
TM7ID
4
TM4IR
5
TM5IR
6
TM6IR
7
TM7IR
8
TM4IE
9
TM5IE
10
TM6IE
11
TM7IE
12
G3LV0
13
G3LV1
14
G3LV2
15
—
13
12
11
10
G3
G3
TM7 TM6 TM5 TM4 TM7 TM6 TM5 TM4 TM7 TM6 TM5 TM4
IE
IE
IE
0
0
0
0
Description
Timer 4 underflow interrupt detection flag
0: No interrupt detected
Timer 5 underflow interrupt detection flag
0: No interrupt detected
Timer 6 underflow interrupt detection flag
0: No interrupt detected
Timer 7 underflow interrupt detection flag
0: No interrupt detected
Timer 4 underflow interrupt request flag
0: No interrupt request
Timer 5 underflow interrupt request flag
0: No interrupt request
Timer 6 underflow interrupt request flag
0: No interrupt request
Timer 7 underflow interrupt request flag
0: No interrupt request
Timer 4 underflow interrupt enable flag
0: Disabled
Timer 5 underflow interrupt enable flag
0: Disabled
Timer 6 underflow interrupt enable flag
0: Disabled
Timer 7 underflow interrupt enable flag
0: Disabled
Group 3 interrupt priority level register (LSB)
Group 3 interrupt priority level register
Group 3 interrupt priority level register (MSB)
Set a level from 6 to 0.
"0" is returned when this bit is read.
9
8
7
6
5
IE
IR
IR
IR
0
0
0
0
0
1: Interrupt detected
1: Interrupt detected
1: Interrupt detected
1: Interrupt detected
1: Interrupt request
1: Interrupt request
1: Interrupt request
1: Interrupt request
1: Enabled
1: Enabled
1: Enabled
1: Enabled
Interrupt Controller
4
3
2
1
IR
ID
ID
ID
ID
0
0
0
0
9-11
0
0