Bus Controller (BC)
8.13 External Memory Space Access (Non-DRAM Spaces)
During an access to external memory, the BC controls the interface for the read/write request from the CPU. Table
8-13-1 lists the transactions that are supported for the external bus.
Address
Bus width
/data
8
Separation
16
8
Multiplex
16
8-32
Table 8-13-1 External Bus Transaction
Synchronization
Fixed wait
Fixed wait
Fixed wait
Fixed wait
Mode
Handshaking
Handshaking
Handshaking
Handshaking
Asynchronization
Fixed wait
Fixed wait
Fixed wait
Fixed wait