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8-bit Timers
10.1 Overview
This device has 12 reload timers built in.
All are down counters that can be used as interval timers and event counters.
Eight of the timers are also capable of PWM output.
10.2 Features
The features of the 8-bit timers are described below.
• Clock source:
• Cascaded connection: Cascaded connection can be used to form a pure 16-, 24-, or 32-bit timer.
• Interrupts:
• Timer output:
• PWM output:
• Serial interface reference clock generation
Timers 2, 3, 8, and 9 generate reference clocks for serial interfaces 0 to 3.
• A/D conversion start trigger generation
Timer 2 generates the A/D conversion start trigger.
10-2
An internal clock or external clock can be selected as the clock source.
(Timers 0 to B)
• Internal clock: IOCLK, 1/8 IOCLK, 1/32 IOCLK, timer 0 to 3 underflow
• External clock: Counts at the rising edge of the pin input.
Timers 0 and 8, 1 and 9, 2 and A, and 3 and B share multipurpose pins.
Timers 0 to 3, 4 to 7, and 8 to B can be cascaded together.
An interrupt request is generated when a timer underflow occurs. (Timers 0 to B)
Output of underflow cycle divided in half is possible. (Timers 0 to B)
Timers 0 and 8, 1 and 9, 2 and A, and 3 and B share multipurpose pins.
PWM output is permitted. (The cycle and duty ratio can be set.) (Timers 4
to B)
Resolution: 8 bits maximum
PWM output cycle: 58.5 kHz (Resolution: 8 bits, IOCLK = 15 MHz)
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