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A/D Converter
7
ADEN
8
ADSC0
9
ADSC1
10
—
11
—
12
ADMC0
13
ADMC1
14
—
15
—
Note: When a multiple number of channels are to be converted, set "00" initially for ADSC1 to ADSC0.
A/Dn conversion data buffer (n = 0, 1, 2, 3)
Register symbol: ADnBUF
Address:
x'34000410 (n = 0), x'34000414 (n = 1), x'34000418 (n = 2), x'3400041C (n = 3)
Purpose:
This register stores the A/D conversion result for the ANn pin (channel n).
Bit No.
15
14
Bit
ADn ADn ADn ADn ADn ADn ADn ADn ADn ADn
name
BUF15 BUF14 BUF13 BUF12 BUF11 BUF10 BUF9 BUF8 BUF7 BUF6
Reset
0
0
Access
R
R
The A/D conversion result (10-bit data) is stored in bits 15 to 6.
If bits 5 to 0 are read, zeroes are returned.
14-6
Conversion start/execution flag
(conversion can be started by writing a "1" to this flag)
0: Conversion stopped
1: Conversion start/in progress
Selection of conversion channel when converting any one channel/
indicator of current conversion channel when converting multiple channels (LSB)
Selection of conversion channel when converting any one channel/
indicator of current conversion channel when converting multiple channels (MSB)
00: AN0
01: AN1
10: AN2
11: AN3
Must be set to "0".
Must be set to "0".
Conversion channels when converting multiple channels (LSB)
Conversion channels when converting multiple channels (MSB)
00: AN0
01: AN0 to AN1
10: AN0 to AN2
11: AN0 to AN3
Must be set to "0".
Must be set to "0".
13
12
11
10
0
0
0
0
R
R
R
R
9
8
7
6
0
0
0
0
R
R
R
R
5
4
3
2
–
–
–
–
0
0
0
0
R
R
R
R
1
0
–
–
0
0
R
R
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